Physical Design Engineer (ASIC / AI / CPU)

Responsibilities

• Lead physical design implementation for advanced-node digital ASIC, AI accelerator, and CPU chips.
• Perform full-chip and block-level physical design activities from gate-level netlist to GDSII tape-out, including floor planning, placement, clock tree synthesis (CTS), routing, and physical verification.
• Drive PPAC (Power, Performance, Area, and Cost) optimization across advanced semiconductor process technologies.
• Conduct layout design and optimization for both digital and mixed-signal/analog circuits.
• Execute signoff activities including Physical Verification (DRC/LVS), IR Drop, EM analysis, Static Timing Analysis (STA), and SPICE validation.
• Collaborate closely with front-end design, architecture, verification, package, and process teams to achieve design closure and product targets.
• Support advanced packaging initiatives and evaluate emerging technologies in heterogeneous integration, chiplet architectures, and next-generation packaging solutions.
• Troubleshoot and resolve complex physical design challenges to ensure successful tape-out and silicon bring-up.

Requirements

• Bachelor's, Master's, or PhD degree in Electrical Engineering, Microelectronics, Computer Engineering, or a related field.
• Strong understanding of IC development flow, from architecture and RTL design through physical implementation and tape-out.
• Hands-on experience with physical design implementation, including floorplanning, placement, CTS, routing, timing closure, and physical signoff.
• Knowledge of Physical Verification (PV), IR/EM analysis, STA, and SPICE simulation methodologies.
• Experience with industry-standard EDA tools such as Cadence Innovus, Synopsys ICC2/Fusion Compiler, PrimeTime, StarRC, Calibre, or equivalent.
• Understanding of PPAC trade-offs and optimization techniques.
• Exposure to analog layout, custom design, or advanced packaging technologies is a plus.
• Strong analytical, problem-solving, and cross-functional communication skills.
• Ability to work effectively in a fast-paced, highly collaborative semiconductor development environment.

Regret to inform that only shortlisted candidates will be notified.
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EA Registration Number: R1878287
Business Registration Number: 201735941W.