Sr. Test Engineer

Job description

• Test program development for Digital, PMIC, RF & Mixed Signal products on

• ATE (primarily on Advantest 93k - SmarTest 7, SmarTest 8 / Teradyne UFLEX)

• Work closely with the design engineers on the first silicon debug, device characterization, test program bring up and production release activities

• Debug of digital vectors (JTAG/SCAN/ATPG / Functional / Mbist) and Device characterization across PVT (Process, Voltage and Temperature)

• Understanding and experience in characterization of Mixed Signal IP (ADC, DAC, PLL and etc.)

• Involve on test program hand off, production release, yield improvement and test time reduction

• High level of collaboration and interaction with diƯerent Product Engineering,

• Design Engineering, Quality Engineering, and Foundry Engineering teams.

Job Requirements:

• Graduates or Diploma/ Degree in Electronics / Electrical or Communication Engineering

• Minimum 5-8 years of working ATE knowledge on Advantest 93k or Uflex/Iflex

• Teradyne platform and experience in developing ATE SOC program from NPI stage to volume ramp stage

• Knowledge and hands on experience with statistical analysis software package and techniques, quality and reliability testing.

• Strong software skills (Java, C/C++, Visual Basic, Perl, Python etc.) for programming and debugging test codes

• Good Knowledge of analog and digital electronics is desired.

• Strong analytical and problem solving ability with desire to perform hands-on work within a lab environment is a must.

• Very strong verbal and written communication skills and able to work independently

• Only Singaporeans/ SPR preferred