Engineer/Staff Engineer – Multi-Dies Physical Verification Engineer

Job Responsibilities:

• Responsible for Multi-Dies Physical Verification Sign-off in area of (3D_Stack, 3D_PERC, 3D_ANT) for tape-out.

• Co-work with Package Design Team to resolve multi-dies integration issues.

• Co-work with ESD Team to run 3D_PERC flow.

• Coordinates with Chip PV Team on active dies related issues (DRC, LVS, ANT, ERC, ESD)

• Provide automation solutions to improve efficiency in tape-out flow.

• Report on Tapeout PV issues.

Requirements:

• Bachelor/Master’s Degree in Electrical/Electronic Engineering / Computer Science

• Familiar with 3D IC Design, like CoWoS, SoIC, EMIB etc.

• Familiar with IC Design front-to-backend flow

• Preferably well-versed in Calibre

• Proficient in script programming, such as Python, Tcl, Perl or C-shell

• Proficient in UNIX (Linux) platforms

• Strong communication skills, problem solving and analytical skills.

We regret that only shortlisted candidates will be notified.

PERSOL Singapore Pte Ltd • RCB No. 200007268E • EA License No. 01C4394 

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