Staff Engineer, Package Development & Engineering
MICRON SEMICONDUCTOR ASIA OPERATIONS PTE. LTD.Salary Range
SGD 60,000 - SGD 120,000 /year
SGD 5,000 - SGD 10,000/month
Skills Required
Job Description
The PDE Pillar Lead will provide technical leadership and strategic oversight for advanced packaging initiatives within the Advanced Packaging & Technology Development organization. This role is accountable for driving technology enablement, yield acceleration, and seamless integration of next-generation packaging solutions. The Pillar Lead will establish governance frameworks, optimize development workflows, and ensure alignment with PDE’s charter to deliver cutting-edge packaging technologies.
Key Responsibilities
Technical Leadership & Program Execution
Own the full lifecycle of PDE technology pillars, including roadmap definition, execution, and closure.
Define technical objectives, key deliverables, and resource allocation for pillar initiatives.
Lead cross-functional engineering teams across TD, HVM, CPI, DRAM, and NPI to achieve aggressive technology milestones.
Governance & Operational Excellence
Develop and enforce standardized methodologies for technical program management and pillar governance.
Drive CapEx/OpEx planning, PTM and MOR processes, and integration of BOP design systems.
Ensure compliance with internal governance models and customer technical requirements.
Strategic Alignment & Technical Communication
Align pillar objectives with PDE’s mission to embed analytics, simulation, and advanced modeling into development workflows.
Facilitate technical communication across BU, PDT, TPM, and central engineering teams.
Provide leadership updates on technical progress, risks, and mitigation strategies.
Performance & Continuous Improvement
Define and monitor KPIs for technology maturity, yield performance, and EOL accountability.
Conduct technical reviews to validate outcomes and capture lessons learned.
Mentor engineers and promote best practices for technical program management.
Qualifications
Bachelor’s or Master’s degree in Engineering, Materials Science, or related technical discipline.
8+ years of experience in semiconductor packaging, process integration, or technology development.
Proven ability to lead complex, cross-functional technical programs in a high-tech environment.
Deep understanding of advanced packaging flows including hybrid bonding, CoWoS, and chiplet integration.
Strong technical communication and leadership skills.
Preferred Skills
Familiarity with Micron’s PDE, CPI, and NPI frameworks.
Expertise in simulation modeling, yield enhancement, and defectivity analysis.
About MICRON SEMICONDUCTOR ASIA OPERATIONS PTE. LTD.
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