SalaryPeak

Senior Staff Engineer, Silicon Photonics Packaging

MARVELL ASIA PTE LTD
Singapore 3+ years Posted Feb 3, 2026

Salary Range

SGD 108,000 - SGD 192,000 /year

SGD 9,000 - SGD 16,000/month

Skills Required

AnalogRFMixed SignalReliabilitySystem DesignCharacterizationSoCOpticsASICICElectrical EngineeringLayoutSiliconElectronics

Job Description

Your Team, Your Impact

Marvell is the leader in data movement interconnects between and inside data centers. We move big data fast, around the globe, with high quality and reliability. We offer semiconductor components and optical subsystems to our networking original equipment manufacturer (OEM), optical module, cloud and telecom service provider customers.

What You Can Expect

  • Develop photonics IC (PIC) and electronics IC (EIC) co-design flow.

  • Define PIC and EIC IO pad frame and 2.5D interposer floor plan.

  • Lead PIC and EIC interconnect schematic and layout design process.  

  • Define PIC and EIC hybrid integration packaging design rules, process flow, and material sets.

  • Lead optical package development to establish package manufacturability and reliability.

  • Collaborate with cross-functional teams consisting of Digital and Analog Circuit designers, Signal/Power Integrity, and substrate layout, and system design team.

  • Drive optical product package qualification activities from initial concept to production.

What We're Looking For

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5+ years of related professional experience. Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3+ years of experience,

  • Expertise in designing hybrid multi-chip integration using 2.5D/3D packaging. Direct experience in Si Photonics based packaging design is a plus. Experience in layout desig tools for ICs and or packaging, and 2.5D/3D EM simulation tools such as HFSS, SI-Wave, Momentum, IE3D, CST, PowerSI.

  • Device or package characterization and testing as required in the development environment. High speed testing background is preferred. 

  • A strong understanding of wafer level packaging process flow.  

  • Direct experience in collaborating with major OSAT for developing advanced packaging technology for high-speed optics and/or electronics IC is a plus.

  • Ability to work with a large body of data and the necessary statistical analysis tools, and the ability to present the data and ideas to a diverse audience.

  • Effective communication and presentation

  • Team player. Expected to work with cross-functional team.