SalaryPeak

Test Engineer

VY SYSTEMS PTE. LTD.
Singapore 1+ years Posted Feb 26, 2026

Salary Range

SGD 54,000 - SGD 72,000 /year

SGD 4,500 - SGD 6,000/month

Skills Required

RF signalsADCsProduct EngineeringMixed SignalQuality EngineeringEngineering DesignProcess DefinitionElectrical EngineeringElectronicsAble To Work Independently

Job Description

Job Description

* Test program development for Digital, PMIC, RF & Mixed Signal products on ATE

* (primarily on Advantest 93k - SmarTest 7, SmarTest 8 / Teradyne UFLEX)

* Work closely with the design engineers on the first silicon debug, device characterization, test program bring up and production release activities

* Debug of digital vectors (JTAG/SCAN/ATPG / Functional / Mbist) and Device characterization across PVT (Process, Voltage and Temperature)

* Understanding and experience in characterization of Mixed Signal IP (ADC, DAC, PLL and etc.)

* Involve on test program hand off, production release, yield improvement and test time reduction

* High level of collaboration and interaction with different Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams

Job Requirements

* Graduates from Diploma/ Degree in Electronics / Electrical Engineering

* Minimum Minimum 1–3 years of relevant experience on the Test Engineering is preferred

* Hands on experience on Teradyne Ultra Flex or Advantest 93K ATE’s is added advantage

* Good Knowledge of analog and digital electronics is desired

* Strong analytical and problem solving ability with desire to perform hands-on work within a lab environment is a must

* Very strong verbal and written communication skills and able to work independently