Staff Product Development Engineer - SOC Characterization & System Validation

THE ROLE:

You will help evaluate the performance of AMD AECG and Embedded products, and will guide, develop and execute IP and system characterization suites and volume system-level testing to guarantee design margins, identify problem areas and ensure the performance and quality of complex hardened IP and subsystems such as the embedded processor subsystems, platform management features and coherent interconnects within AECG products as a member of the product characterization team. 

THE PERSON:

• Driven, curious, and innovative with a strong bias for action and delivering on commitments.
• Values open exchange of feedback and ideas; builds a culture of collaboration and accountability.
• Operates effectively in ambiguity, develops structure, and influences cross-functional teams.

KEY RESPONSIBILITIES:

• Lead characterization strategy and methodology for hardened IP and SoC features across pre- and post-silicon phases; define test plans, acceptance criteria, and quality bars.
• Design and develop functional and performance tests to measure timing, frequency, voltage margins, and power/thermal behaviors; own corner/correlation strategy and coverage.
• Develop volume system test suites to identify problem areas, coverage gaps, yield limiters, and reliability risks; drive root-cause analysis and corrective actions.
• Create system-level tests and workloads to evaluate SoC performance, latency, bandwidth, and QoS under real-world scenarios.
• Implement data post-processing and statistical analysis across operating conditions and volume; generate dashboards, reports, and insights based on experimental data.
• Partner with design, firmware, validation, product engineering, and manufacturing to correlate data, debug complex issues, and close on corrective actions.
• Identify risks, drive mitigations, and communicate status and trade-offs to stakeholders; contribute to technology and methodology roadmaps as well as continuous improvement initiatives.
  

PREFERRED EXPERIENCE:

• Experience in SoC/IP validation, characterization, or test (or equivalent depth) with proven technical leadership and cross-functional influence.
• Strong logic design and RTL fundamentals, proficiency in Verilog/SystemVerilog or VHDL.
• Solid understanding of SoC architectures: embedded processors (e.g., ARM or RISC-V), coherent interconnects, memory subsystems, and multi-core systems.
• Proficiency in scripting (e.g. Python, Tcl or Perl) and building robust automation frameworks.
• Strong embedded C/C++ fundamentals with experience integrating firmware and test harnesses familiarity. Assembly (ARM or RISC-V) and embedded Linux skills are a plus.
• FPGA flows and EDA tools (AMD/Xilinx Vivado advantageous): synthesis, P&R, timing closure, emulation, with an understanding of FPGA internals.
• Hands-on experience with bench and ATE environments: developing characterization suites, bring-up, correlation, and coverage analysis is preferred.
• Applied statistical analysis for experimental data at volume. Comfort with DOE, regression, confidence intervals, outlier detection, and visualization.
• Experience with version control (e.g. git), issue tracking (e.g., Jira), and documentation practices.

ACADEMIC CREDENTIALS:

• BS in EE, CS, ECE or related field; MS preferred

LOCATION:

Singapore