Front End Central Product Integration Engineer – Test & Product Yield Integration (Senior / Staff / Principal)

Key Responsibilities

• Lead and drive global Product Integration initiatives to improve yield, quality, and benchmark performance across technology nodes and products.

• Centralize and synthesize project information (design requirements, test challenges, yield learning) from multiple global teams and drive execution to closure.

• Drive yield breakthroughs by understanding the end‑to‑end test flow, product design and operation, packaging interactions, and manufacturing processes while balancing yield vs. reliability requirements.

• Foster technical innovation by characterizing device failure modes using deep knowledge of device architecture, physics, packaging interaction, and available test/process knobs.

• Define and drive strategies to ensure Packaging Technology and Chip‑Package Interaction are developed and qualified ahead of product qualification.

• Lead cross‑functional and cross‑site taskforces (Product, Test, Yield, Design, Fab, Packaging, Quality, TD) to resolve yield and quality challenges in a timely manner.

• Promote network Best‑Known‑Method (BKM) development, standardization, and business process creation or re‑engineering to improve productivity and efficiency.

• Maintain strong working relationships with stakeholders in Fab, Technology Development, Product Engineering, Test Engineering, Quality, and Packaging teams.

• Communicate project status, risks, and proposals effectively through clear written reports and technical presentations.

• Proactively identify obstacles, escalate when needed, and partner with management to drive successful outcomes.

• Travel to Micron fab and development sites as needed to support project execution and alignment.
  

  Minimum Qualifications

  • Bachelor’s, Master’s, or PhD degree in Electrical Engineering, Microelectronics, Physics, Chemistry, Materials Science Engineering, or a related field.

  • 2+ years of experience in one or more of the following:

  • Product Integration

  • Test Engineering

  • Yield Engineering

  • Design Engineering

  • BEOL semiconductor processing or process integration

  • Strong knowledge of Semiconductor Device Physics and DRAM product operations.

  • Understanding of wafer fabrication process flows, parametric/electrical testing, and probe yield.

  • Strong data analysis, debugging, troubleshooting, and problem‑solving skills with attention to detail.

  • Effective verbal and written communication skills with the ability to present to both small and large technical audiences.

  • Demonstrated ability to collaborate across functions and cultures, building strong customer and co‑worker relationships.

  • Ability to work independently with minimal supervision, manage multiple priorities, and stay organized.

  • Intermediate to advanced PC skills, including Microsoft Office.

  • Willingness to travel approximately 20–50% to support global project needs.

  • Flexibility to adapt to changing priorities and take on additional responsibilities as needed.

  Preferred Qualifications

  • Experience in DRAM High Bandwidth Memory (HBM) products.

  • Exposure to DRAM HPM, advanced packaging, chip‑package interaction, BEOL integration, or layout‑related topics.

  • Experience working across Test, Product, Yield, Design, Packaging, and Manufacturing organizations.

  • Proven ability to drive alignment and execution in central or network‑level roles.

  • Strong interest in innovation, continuous improvement, and scalable solution development.